Related by context. Frequent words. (Click for all words.) 67 BIST 64 parasitic extraction 63 SystemC models 61 chip SoCs 61 deep submicron 60 testability 59 boundary scan 59 computational lithography 59 datapath 58 Altera FPGAs 58 JTAG Boundary Scan 58 Olympus SoC 58 memory compilers 57 ScanWorks 57 ASIC prototyping 57 Boundary Scan 57 reconfigurability 57 custom ASICs 57 Cadence Virtuoso 57 ASIC FPGA 57 Synopsys Galaxy 57 logic synthesis 57 DesignWare IP 56 I2C interface 56 Synopsys DesignWare 56 NVRAM 56 protocol conformance 56 Stratix II 56 AWG# 56 STT RAM 56 hardware accelerators 56 PHY layer 56 PowerTheater 56 RS# interface 56 floorplanning 56 equivalence checking 55 PCB layout 55 CMOS logic 55 SPI#.# 55 Xilinx FPGA 55 GDSII 55 synthesizable 55 SPI interface 55 Design Compiler 55 JTAG interface 55 deep sub micron 55 SerDes 55 IO Link 55 RF ICs 55 Virtex 5 55 netlist 55 PureSpec 55 capacitive touch sensing 55 analog circuits 55 Sigrity 55 eDRAM 55 Cynthesizer 55 netlists 55 RTL synthesis 55 TCP IP networking 54 CPLDs 54 I2C bus 54 logic analyzers 54 EEPROM 54 troubleshooting tools 54 Xilinx FPGAs 54 BEOL 54 debugging tools 54 locked loop PLL 54 IEEE #.# [002] 54 SRAMs 54 chip SOC 54 chip SoC designs 54 DSP FPGA 54 HSPICE 54 microelectronic devices 54 logic analyzer 54 FPGA synthesis 54 SATA controller 53 demodulation 53 SoC designs 53 loopback 53 IP cores 53 reprogrammable 53 multiport 53 transmitters receivers 53 E#A [002] 53 PXI Express 53 PLDs 53 testbench 53 RF Microwave 53 PNX# 53 TSMC Reference Flow 53 DSP algorithms 53 ModelSim 53 EDID 53 #.# micron CMOS 53 baseband processing 53 VCXO 53 CODECs 53 bi directional communication